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Modern Code for Intel Xeon Phi Processors - Colfax Research
This series of 45-minute webinars was presented by Colfax International in collaboration with Intel in 2016. ► Part 1 | ► Part 2 | ► Part 3 1. Strategies for Multi-Threading on Intel Xeon Phi Processors Practical recipes for optimizing performance in multi-threaded computational applications on Intel Xeon Phi processors. Presentation covers common issues with thread parallelism: excessive synchronization, false sharing, insufficient iteration space size, and methods for overcoming these issues: parallel reduction, data padding, strip-mining and loop collapse, and nested parallelism. ► Click to watch recording (45 min) – this webinar aired September 28, 2016 Slides: Colfax_Modern_Code_Webinar_01.pdf (5 MB) — this file is available only to registered users. Register or Log In. 2. Fine-Tuning Vectorization on Intel Xeon Phi Processors Vectorization of computational applications on Intel Xeon Phi processors. Covers automatic vectorization essentials and the toolkit for advanced tuning of vectorization performance, including compiler directives, data container optimization, and language extensions for expression of data parallelism. ► Click to watch recording (45 min) – this webinar aired December 8, 2016 Slides: Colfax_Modern_Code_Webinar_02.pdf (4 MB) — this file is available only to registered users. Register or Log In. 3. Controlling Memory Traffic on Intel Xeon Phi Processors Overview of [...]